hi-8591 description arinc 429 line receiver interface in a small outline package receiver input hysteresis at least 2 volt test inputs bypass analog inputs and force digital outputs to a one, zero or null state 3.3v single rail supply voltage +/-30 v common-mode performance >140 kohm input impedance lightning protection simplified with the ability to add 40 kohm external series resistors features pin configurations supply voltages function table vcc = 3.3v 5.0v 10% 10%, pin description table the hi-8591 is an arinc 429 bus interface receiver designed to operate from a single 3.3 v or 5 v supply. the part is designed with high-impedance inputs to minimize bus loading, and has an exceptional input common-mode performance in excess of +/- 30v, making it immune to ground offsets around the aircraft. the rina and rinb inputs of the standard hi-8591 may be connected directly to the arinc 429 bus. to enable external lightning protec- tion circuitry to be added, the hi-8591-40 variant is avail- able. the hi-8591-40 requires only the addition of external 40 k , ? watt resistors in series with rina and rinb to allow the part to meet the lightning protection requirements of do-160d level 3. the typical 10 volt differential arinc 429 signal is trans- lated and input to a window comparator and latch. the comparator levels are set just below the standard 6.5 volt minimum arinc data threshold and just above the stan- dard 2.5 volt maximum arinc null threshold. the testa and testb inputs bypass the analog inputs for testing purposes. also if testa and testb are both taken high, the digital outputs are forced to zero. see holt application note an-300 for more information on lightning protection. (ds8591, rev. h) 03/13 symbol function description vcc supply 3.3v or 5v supply testa logic input cmos rinb arinc input receiver b input rina arinc input receiver a input gnd power ground routa logic output receiver cmos output a routb logic output receiver cmos output b testb logic input cmos -1.25v to 1.25v -1.25v to 1.25v 0 0 0 0 -3.25v to -6.5v 3.25v to 6.5v 0 0 0 1 3.25v to 6.5v -3.25v to -6.5v 0 0 1 0 xx0101 xx1010 xx1100 rina rinb testa testb routa routb rina - 4 testa - 2 vcc-1 rinb - 3 5 - gnd 7 - routb 8 - testb 6 - routa 8 - pin plastic narrow body soic hi-8591psi, hi-8591pst & hi-8591psm hi-8591psi-40, hi-8591pst-40 & hi-8591psm-40 16- pin 4mm x 4mm chip-scale package 16 nc 15 vcc 14 testb 13 nc testa 1 rinb 2 rina 3 nc 4 12 routb 11 nc 10 routa 9nc nc 5 gnd 6 nc 7 nc 8 hi-8591pci, hi-8591pct, hi-8591pci-40 & hi-8591pct-40 march 2013 arinc 429 line receiver holt integrated circuits www.holtic.com
hi-8591 functional description receiver figure 1 shows the general architecture of the arinc 429 receiver. the receiver operates off the vcc supply only. the inputs rina and rinb each require 140k of resis- tance between the arinc bus and comparator. this resis- tance is completely on-chip for the hi-8591. in contrast, the hi-8591-40 has 100 k on-chip and requires an exter- nal 40k , ? watt resistor on each of the arinc 429 input pins. the hi-8591-40 device is typically chosen for appli- cations where lightning protection is a requirement. after level translation, the inputs are buffered and become inputs to a differential amplifier. the amplitude of the differ- ential signal is compared to levels derived from a divider between vcc and ground. the nominal settings corre- spond to a one/zero amplitude of 6.0v and a null ampli- tude of 3.3v. the status of the arinc receiver input is latched. a null input resets the latches and a one or zero input sets the latches. the logic at the output is controlled by the test signal which is generated by the logical or of the testa and testb pins. if testa and testb are both one, the hi- 8591 outputs are pulled low. this allows the digital out- puts of a transmitter to be connected to the test inputs through control logic for system self-test purposes. txbout txaout tx1in tx0in arinc channel rinb rina testa testb { hardwire or drive from logic routb routa 3.3v vcc v- -15v gnd txd0 txd1 rxd0 rxd1 fpga arinc channel 1 2 8 6 7 4 3 4 5 6 7 2 3 hi-8591 application information 15v v+ 8 5 hi-8586 slp1.5 1 figure 2 shows a possible application of the hi-8591 interfacing an arinc 429 bus input to a 3.3v asic or fpga. in this example a hi-8586 arinc 429 line driver is used to take 3.3v logic outputs and generate the nec- essary 10v differential signal for driving an arinc 429 bus. gnd figure 2 - application diagram test rina rinb null zero null one testa routb routa figure 1 - receiver block diagram sq r latch esd protection and translation latch sq testb r testa testb test holt integrated circuits 2
voltages referenced to ground supply voltages vcc......................................-0.3v to +7v arinc input - pin s3&4 voltage at either pin.........+120v to -120v dc current per input pin.................... 10ma power dissipation at 25c plastic dip............0.7w ceramic dip..........0.5w solder temperature (reflow) 260 storage temperature........-65c to +150c c absolute maximum ratings recommended operating conditions parameters symbol test conditions min typ max units arinc input voltage one or zero v din v nin differential volt., pin s3&4 volts 6.5 10 13 2.5 logic input voltage high low v ih v il arinc input resistance rina to rinb r diff rina or rinb to gnd r gnd logic input current source sink i il i ih null logic output drive voltage one zero v oh1 v ol1 current drain operating common mode v com """ with respect to ground - - -30.0 - +30.0 75% vcc - - - - 25% vcc volts volts volts volts supplies floating - - 300 150 k k "" v in = 0.8v v in = 2.0v 20.0 - - a vcc=5v i oh = 5ma 10% vcc = 5v = 5ma 10% i oh - 0.5 - - - v v 1.5 - 5.0 ma i cc1 pins 2 , 8 = 0v; pins 3, 4 open 2.4 20.0 - - a v oh2 vcc= 3.3v = 1.5ma 10% i oh - - v 2.4 v ol2 vcc = 3.3v = 1.5ma 10% i oh 0.4 - - v rina or rinb to vcc r vcc - 150 k "" - - - supply voltages vcc..............................3.3v to 5v 10% operating temperature range industrial ...................... -40c to +85c hi-temp ...................... -55c to +125c dc electrical characteristics vcc = 3.3v or 5.0v unless otherwise stated 10% 10% operating temperature range, note: stresses above absolute maximum ratings or outside recommended operating con- ditions may cause permanent damage to the device. these are stress ratings only. opera- tion at the limits is not recommended. hi-8591 includes external 40k for hi-8591-40 holt integrated circuits 3
vcc unless otherwise stated = 3.3v 10% or 5.0v 10% operating temperature range, ac electrical characteristics testa or b pin 2 or pin 8 0v vcc vcc 0v t ptl t pth t pin 6 or pin 7 figure 4 - test pin timing v pin 4 - pin 3 diff 0v 10v -10v vcc 0v t rr t rr t fr t 10% 90% t phlr t t plhr t vcc 0v t plhr t t phlr t pin 6 pin 7 figur e 3 - receiver timing parameters symbol test conditions min typ max units receiver propagation delay output high to low t phlr - receiver output transition times output high to low output low to high output low to high plhr t t fr rr t - - - 50 50 600 600 15 15 ns ns ns ns input capacitance (1) arinc differential c ad c as pf -510 10 arinc single ended to ground logic c in - - --10 pf pf defined in figure 3, c = 50pf 1000 1000 l 1. guaranteed but not tested notes: vcc = 3.3v 10% - 600 ns 900 vcc = 5.0v 10% vcc = 3.3v 10% - 600 ns 900 vcc = 5.0v 10% test pin propagation delay output high to low t pth - output low to high ptl t - - - ns ns defined in figure 4, c = 50pf 100 100 l vcc = 3.3v 10% -- ns 60 vcc = 5.0v 10% vcc = 3.3v 10% -- ns 60 vcc = 5.0v 10% vcc = 3.3v or 5.0v 10% hi-8591 holt integrated circuits 4
ordering information hi - 8591 - xx x xx x input series resistance built-in required externally part number 100 kohm 40 kohm -40 140 kohm 0 no dash number temperature range flow burn in -40c to +85c -55c to +125c no yes i m -55c to +125c no t part number t i m package description 8 pin plastic dip (8p) not available with m flow 16 pin plasti c4x4mm chip scale (16pcs) not available with m flow part number pd pc 8 pin plastic narrow body soic (8hn) 8 pin cerdip (8d) not available pb-free ps cr lead finish part number 100% matte tin (pb-free, rohs compliant) f tin / lead (sn / pb) solder blank the hi-8591pci and hi-8591pct use a 16-pin plastic chip-scale (qfn) package. this package has a metal heat sink pad on its bottom surface. this heat sink should be soldered down to the printed circuit board for optimum thermal dissipation. the heat sink is electrically isolated from the chip and can be soldered to any ground or power plane. however, since the chips substrate is at v+, connecting the heat sink to this power plane is recommended to avoid coupling noise into the circuit. heat sink - chip-scale package only hi-8591 holt integrated circuits 5
revision history p/n rev date description of change ds8591 f 06/21/11 updated pad & heat-sink dimensions on 16-pin plastic chip-scale (qfn) package to reflect current package vendor's dimensions. g 08/03/12 updated vil/vih specification, solder temperature, and package dimensions (8ps, 16pc). h 03/13/13 clarify arinc input resistance and correct error in rdiff. clarify solder temperature in absolute maximum ratings. clarify operating temperature range in recommended operating conditions. holt integrated circuits 6 hi-8591
hi-8591 package dimensions 8-pin cerdip inches (millimeters) package type: 8d bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) .380 .004 (9.652 .102) .005 min (.127 min) .314 .003 (7.976 .076) .200 max (5.080 max) .248 .003 (6.299 .076) .039 .006 (.991 .154) .163 .037 (4.140 .940) .018 .006 (.457 .152) .056 .006 (1.422 .152) .015 min (.381min) .350 .030 (8.890 .762) .010 .006 (.254 .152) base plane seating plane .100 bsc (2.54) 8-pin plastic small outline (soic) - nb (narrow body) inches (millimeters) package type: 8hn bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) see detail a 0 to 8 detail a p in 1 .236 (6.00) .154 (3.90) .193 (4.90) .007 .003 (.175 .075) .050 (1.27) .033 .017 (.835 .435) .056 .006 (1.413 .163) .007 .003 (.175 .075) .016 .004 (.410 .100) bsc .050 (1.27) bsc bsc bsc holt integrated circuits 7
hi-8591 package dimensions 8-pin plastic dip .385 .015 (9.799 .381) .025 .010 (.635 .254) .335 .035 (8.509 .889) .250 .010 (6.350 .254) .100 bsc (2.54) .135 .015 (3.429 .381) .055 .010 (1.397 .254) .1375 .0125 (3.493 .318) .019 .002 (.483 .102) .0115 .0035 (.292 .089) .300 .010 (7.620 .254) inches (millimeters) package type: 8p bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) 16-pin plastic chip-scale package inches (millimeters) package type: 16pcs bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) top view bottom view electrically isolated heat sink pad on bottom of package connect to any ground or power plane for optimum thermal dissipation . . .157 (4.000) bsc .157 (4.000) bsc .039 (1.000) max. .008 (.200) typ. .016 .002 (.400 .050) .102 .002 (2.600 .050) .026 (.650) bsc .012 .002 (.300 .050) .102 .002 (2.600 .050) holt integrated circuits 8
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